vllm.v1.attention.backends.mla.flashinfer_mla_sparse_sm90 ¶
FlashInfer sparse MLA backend for SM90 (Hopper) NoPE models.
Wraps FlashInfer's BatchMLAPagedAttentionWrapper (FA2/FA3 paths), which as of FlashInfer 0.6.18 supports head_dim_kpe=0 (GLM-5.3-Flash NoPE MLA) and FP8 E4M3 KV caches on SM90 with in-kernel dequantization: the FP8 cache is read directly (half the bf16 HBM traffic) and converted to BF16 in shared memory, while queries stay BF16 (no query quantization).
Sparsity rides the same trick the FA-based sparse backend uses: with page_size=1 the per-token top-k slot indices ARE the page table, so each query token becomes one varlen batch row whose kv_indices slice is its top-k row and whose kv_len is its valid count. Causality is already encoded by the indexer's selection, so causal=False.
CUDA-graph handling: plan() copies its inputs to host unconditionally, so it must stay outside graph capture. Each metadata builder owns a wrapper, reserved capture-stable device buffers, and the plan parameters. The wrapper bakes the per-row kv_len into its int schedule at plan() time — run() never reads the device-side buffer — so the metadata builder replans every step (outside capture) with exact host-side lengths derived from the batch's sequence lengths; a full-width schedule would send the kernel past each row's valid count into the -1 tail of the converted index buffer (illegal address). Per-step content (top-k slots) is written into the reserved buffers by kernels inside the captured forward, and captured runs read the refreshed plan buffers on replay.
KV cache format: plain contiguous E4M3 [num_blocks, block_size, 512] (uint8 storage) with a per-tensor k_scale; BF16 caches also work. The per-token x 128-channel-group ckv_scale_arr layout is supported by the kernel but not wired yet (it needs a group-quantizing cache-write op).
Classes:
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FlashInferMLASparseSM90Builder–Reuse the common sparse metadata (req ids, topk buffer access).
FlashInferMLASparseSM90Builder ¶
Bases: FlashInferMLASparseMetadataBuilder
Reuse the common sparse metadata (req ids, topk buffer access).
Source code in vllm/v1/attention/backends/mla/flashinfer_mla_sparse_sm90.py
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_kv_lens_host(cam) ¶
Exact per-row KV lengths, host-side (the flashinfer wrapper bakes them into its schedule at plan time; there is no device-side path).
A row for the j-th query token of request i attends seq_lens[i] - q_len[i] + j + 1 tokens. The indexer's selection then bounds the valid count: contexts up to index_topk select everything (valid == context); longer contexts keep the top index_topk pool-expanded tokens plus the trailing incomplete pool (valid == index_topk + context % index_kpool). Both match the count of non -1 entries the convert kernel produces.
Source code in vllm/v1/attention/backends/mla/flashinfer_mla_sparse_sm90.py
_SM90State ¶
Builder-owned wrapper, capture-stable buffers, and plan parameters.
One instance serves every MLA layer in an attention group because the plan depends only on the batch shape, not the layer.
Methods:
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plan–Replan with exact per-row KV lengths (CPU int32,
[num_tokens]).
Source code in vllm/v1/attention/backends/mla/flashinfer_mla_sparse_sm90.py
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plan(num_tokens, kv_lens) ¶
Replan with exact per-row KV lengths (CPU int32, [num_tokens]).
The wrapper bakes kv_len into its int schedule from host values; run() never reads the device kv_len_arr buffer. Scheduling with the full buffer width while kv_indices rows carry a -1 tail past each row's valid count makes the kernel compute -1 * ckv_stride_page (illegal address), so the lengths must be exact at plan time and replanned every step as contexts grow. Must run outside CUDA graph capture: the in-place refreshed plan_info/indptr buffers are what captured runs read.